In a current market, processors of different brands exist. In an aspect of hardware, if pin to pin (Pin to Pin) compatibility is implemented between different processors, board multiplexing may be conveniently achieved. That is, on a board, a performance upgrade may be implemented only by replacing a CPU. However, because different processors differ in aspects such as memory control, QPI (Quick Path Interconnect, quick path interconnect) implementation, and CPU architecture, it is not easy for a BIOS (Basic Input/Output System, basic input/output system) to implement compatibility between different processors at a code level.
Therefore, in the prior art, the following two methods are generally adopted to implement the compatibility between different processors.
1. A BIOS program is saved in a FLASH device of a board, and in a power-on process of the board, a CPU maps codes in a FLASH memory to a memory space by default, and starts the BIOS program from a certain address. In a startup process, the BIOS performs different branch processing according to different types and architecture of CPUs. That is to say, a set of codes is processed differently inside the BIOS according to different CPUs.
This manner not only involves a large quantity of codes, but also has a complex processing logic among the codes, so maintenance and expansibility are difficult.
2. According to different CPUs, different BIOS programs are written into a FLASH memory of a board to implement compatibility of the different CPUs.
In this manner, firstly, a user needs to know how to write a BIOS. Next, the user also needs to know which CPU uses which version of the BIOS. Once an error occurs in the writing, it is caused that the whole board may not be started normally.
As may be seen, the implementation of the two methods for implementing the compatibility of different processors is complex and is not easy to operate.